The noise looks like I would expect from the INA226 chip configured for this sample rate (roughly 10 LSB peak-to-peak). By looking at the ADC step size in the graph it looks like the Arc was configured for a 0.5 Ohm shunt resistor, so these 10 2.5µV steps would correspond to 50µA. The offset is something we are looking into how we can zero out (this is currently not done as part of the regular main output offset calibration from the menu as we can’t disconnect/short the ADC pins for zeroing internally).
If you don’t need 1000 samples per second then the data can be downsampled after recording, this will reduce the noise level.
Can you power the device under test using the Arc main terminals instead, or is this for a subsystem measurement? The dynamic range of the main terminal current readout is several orders of magnitude larger than that of the expansion connector ADC channel. Measuring sub-µA sleep currents while dealing with several Amps of peak current during active mode is something only the main terminals will be able to do, but I’m not sure what current span you are dealing with in this case?